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Infineon wins EU funding for world's first 300mm GaN factory: Silicon cost parity ahead
GaN semiconductor manufacturing reaches a turning point as the European Commission clears 319 million euros for Infineon to ...
AI-driven node transitions favor low-defect epi wafers, scrap-cutting inline metrology, long-term supply contracts, and localized production.Dublin, Oct. (GLOBE NEWSWIRE) -- "GPU-Grade Silicon Wafer - ...
LIANYUNGANG, JIANGSU, CHINA, October 23, 2026 /EINPresswire.com/ -- Inside high-temperature semiconductor fabrication ...
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China pushes for 70% homegrown silicon wafer use as domestic firm ramps up 12-inch production
A report by Nikkei Asia claims that China wants 70 percent of the silicon wafers used by its chipmakers this year to be sourced from domestic suppliers. The move marks another step in the country’s ...
IntroductionOn October 21, 2026, NVIDIA announced that it would significantly increase production capacity over the next few ...
Boost ROI by cutting costs and waste through wafer reuse, process automation, advanced inspection, and expansion into semiconductor testing and solar applications.Dublin, Oct. (GLOBE NEWSWIRE) -- ...
Taiwan's three biggest upstream silicon wafer makers confirmed synchronized price increases of at least 10% across every commercial wafer size on Monday, ending more than three years of pricing ...
Every solar panel sitting on an American rooftop looks like a single finished product. It has a frame, a sheet of glass and a grid of dark cells that turn sunlight into electricity. What almost nobody ...
Use left and right arrow keys to seek audio. The AI boom has already pushed memory prices to historic highs and driven GPU costs well beyond what most consumers can absorb. The next casualty appears ...
Aehr Test Systems (AEHR) said it received a follow-on production order from its lead silicon photonics wafer-level burn-in, or WLBI, customer. The company noted that the order is for a fully automated ...
A Kyoto University and Phenitec Semiconductor team fabricated silicon carbide JFETs on a 6-inch wafer, achieving threshold-voltage standard deviation below 0.07 volts in the wafer center.
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